The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device free of breakdown caused by static electricity and the like.
Generally, liquid crystal display devices (LCDs) have an active matrix structure including a plurality of thin film transistors (TFTs) arranged in an active matrix manner on a transparent insulating substrate such as a glass substrate and made of polysilicon or CdSe.
In order to utilize characteristics of polysilicon TFTs, such active matrix LCDs are fabricated by integrating, on to a transparent insulating substrate such as a glass substrate, a plurality of TFTs, a gate driving circuit for driving gates of the TFTs and a video data driving circuit for applying input video data to pixels in an optional order.
By this structure, it is possible to reduce the fabrication cost and the wiring cost, and improve the reliability of the device finally obtained.
Referring to FIG. 1, there is illustrated a conventional active matrix LCD. As shown in FIG. 1, the active matrix LCD includes a glass substrate 1, a plurality of uniformly spaced gate bus lines 2 formed on the glass substrate 1, and a plurality of uniformly spaced data bus lines 3 formed on the glass substrate 1 and arranged to cross the gate bus lines 3. A gate driving circuit 4 is also provided which applies gate driving signals respectively to the gate bus lines 2 in accordance with a start pulse SP and a clock signal CK. The active matrix LCD further includes a plurality of pixels 5 regularly arranged among the gate bus lines 2 and the data bus lines 3, a plurality of TFTs 6 respectively connected to the pixels 5, the gate bus lines 2 and the data bus lines 3 and adapted to apply the video data received therein via the data bus lines 3 to the pixels 5 in accordance with the gate driving signals, and a data driving circuit 7 for applying data signals to the data bus lines 3 in an optional order in response to the input video data. In FIG. 1, the reference numeral 8 denotes a gate insulating film 8.
As shown in FIG. 1, the gate driving circuit 4 includes a plurality of shift registers SR.sub.1, SR.sub.2, SR.sub.3 . . . , and SR.sub.n (in the illustrated case, n is 4) adapted to output sequential signals in response to the input start pulse SP and the input clock signal CK, and a plurality of inverters I.sub.1, I.sub.2, I.sub.3 . . . , and I.sub.n (in the illustrated case, n is 4) driven by a high level voltage V.sub.DD and a low level voltage V.sub.SS applied thereto and adapted to invert the sequential signals received from the shift registers SR.sub.1 to SR.sub.n, thereby outputting gate driving signals, respectively.
FIG. 2 is a circuit diagram of each inverter shown in FIG. 1. Generally, the inverter has a complementary metal oxide semiconductor structure including a P-channel metal oxide semiconductor (PMOS) and an N-channel metal oxide semiconductor (NMOS), as shown in FIG. 2.
Now, operation of the conventional LCD device will be described in conjunction with FIG. 1.
The inverters I.sub.1 to I.sub.n apply sequentially gate driving signals to the gate bus lines 2 in the order that the uppermost one of the gate bus lines 2 receives first the gate driving signal. On the other hand, the data driving circuit 7 outputs sequentially video data via the data bus lines 3 in the order that the outputting of the video data is begun from the leftmost one of the data bus lines 3. As a result, the video data are sequentially displayed in the order from the leftmost pixel to the rightmost pixel and in the order from the uppermost pixel to the lowermost pixel.
Although not shown in FIG. 1 which is a planar circuit diagram, the gate bus lines 2 should be electrically insulated from the data bus lines 3 (or drain bus lines). For such an electrical insulation, a gate insulating film 8 such as a silicon nitride (SiN.sub.X) film is formed between the gate bus lines 2 and the data bus lines 3 by use of a deposition process such as a plasma enhanced chemical vapor deposition (PECVD) process.
This gate insulating film plays an important role for normal operations of the TFTs. However, careful attention must be paid to the formation of the gate insulating film and the preceding or subsequent step to the formation because the gate insulating film has a very small thickness.
For example, a static electricity may be generated during formation of a polysilicon TFT array on the glass substrate 1 as the transparent insulating substrate or liquid crystal injection performed after the formation. Such a static electricity may greatly break down the gate insulating film 8, depending on surrounding environment or moved condition of the substrate.
In other words, the gate insulating film 8 formed between the gate bus lines 2 and the data bus lines 3 may be relatively incomplete or excessively thin at its step portion, as compared to other portions. In this case, the gate insulating film 8 is likely to be broken down due to an impact of static electricity discharged. Through the broken-down portion of the gate insulating film 8, a short circuit between the gate electrodes of the TFTs and the drain electrodes may occur. This serves as a fatal defect in fabrication of an LCD device.
For avoiding such a short circuit between gate and drain electrodes, there has been proposed a method utilizing a short circuit line to which separate voltages V.sub.DD10 and V.sub.SS10 are applied.
In accordance with this method, a separate short circuit line 9 is provided in an LCD so as to short-circuit all of the data bus lines 2 and the gate bus lines 3, as shown in FIG. 3a.
Even when a static electricity is generated in fabrication of TFTs, the gate bus lines 2 and the data bus lines 3 can always be kept at constant voltage level by virtue of the short circuit line 9. As a result, it is possible to prevent a breakdown of the gate insulating film and a short circuit between the gate electrodes and the drain electrodes in fabrication of TFTs.
After completion of the formation of TFTs on the glass substrate 1, a photo-etching process step is performed to cut the short circuit line 9 among the gate bus lines 2, as shown in FIG. 3b.
For an injection of liquid crystal, another substrate is then placed such that it faces the glass substrate 1 formed with the TFT array and then bonded thereto. Thereafter, the liquid crystal injection is carried out. After the liquid crystal injection, the glass substrate 1 is subjected to a cutting work for dividing it into individual LCDs. At this time, the data bus lines 3 are separated from the short circuit line 9. Thus fabrication of a TFT-LCD panel is completed.
FIG. 3c shows a circuit diagram of a region K, namely, an inverter I.sub.2 of FIGS. 3a and 3b. As shown in FIG. 3c, the inverter I.sub.2 includes a PMOS and an NMOS, both of which have drains connected to a common gate line 2. This common gate line 2 is coupled to the short circuit line 9.
If the short circuit line 9 is not provided in the case of FIGS. 3a and 3b, the gate insulating film 8 may be broken down by a static electricity generated on a gate electrode of each TFT 6. This is because there is no current passage provided for discharging charges of the static electricity out of the gate electrode.
Where the short circuit line 9 is provided, however, the static electricity generated on the gate electrode can be freely discharged. As a result, it is possible to avoid a potential difference between the gate bus lines 2 and the data bus lines 3 and, thus, a breakdown of the gate insulating film 8.
Thus, the conventional LCD structure can avoid the breakdown of the gate insulating film 8 caused by the static electricity generated during the fabrication of TFTs on the glass substrate 1.
Since the short circuit line 9 is cut among the gate bus lines 2 after the formation of the TFT array on the glass substrate 1, as shown in FIG. 3b, it no longer plays any role for static electricity generated during subsequent steps for liquid crystal injection after the formation of the TFT array. As a result, the static electricity generated at the liquid crystal injection steps may break down the gate insulating film 8.
In addition to the short circuit line 9, the conventional LCD structure illustrated in FIGS. 3a to 3c needs two electrodes for the application of two additional voltages V.sub.DD10 and V.sub.SS10. For formation of such additional electrodes, it is required to perform a separate masking work, and thereby an etching process and photoresist removal process.
As a result, there are drawbacks of a lengthened LCD fabrication time, an increased manufacture cost and an increased probability of failure.